1. Field of the Invention
The present invention relates to a digital-signal forming circuit, which is used in a time-division multiplexing radio receiver, that uses a reference voltage generated in accordance with the strength of a demodulated signal obtained by demodulating a received signal in order to obtain a digital signal by shaping the demodulated signal into rectangular waves.
2. Description of the Related Art
Conventional time-division multiplexing radio receivers include a digital-signal forming circuit in which a demodulated signal obtained by demodulating a received signal is shaped into rectangular waves by comparing the demodulated signal with a reference voltage.
FIG. 3 shows main components of a conventional digital-signal forming circuit.
The conventional digital-signal forming circuit includes a demodulator 1, a signal comparator 2 composed of an operational amplifier, a make-and-break switch 3, a reference voltage unit 5, a controller 6 composed of a central processing unit (CPU) 6, an intermediate-frequency (IF) signal input terminal 21 to which an IF signal is input, and a digital signal output terminal 23. as shown in FIG. 3. The reference voltage unit 5 includes a resistor 11 connected across the input and output ends thereof, and a capacitor 14 connected to the output end so as to branch.
The demodulator 1 outputs a demodulated signal Sf by demodulating the IF signal. The comparator 2 outputs a digital signal by shaping the demodulated signal into rectangular waves, while the non-inverting input (indicated as xe2x80x9c+xe2x80x9d in FIG. 3) of the comparator 2 is being supplied with the demodulated signal and the inverting input (indicated as xe2x80x9cxe2x88x92xe2x80x9d in FIG. 3) of the comparator 2 is being supplied with a reference voltage. The control terminal of the make-and-break switch 3 is supplied with a make-and-break signal. The make-and-break switch 3 is turned on when the make-and-break signal is at high level, while it is turned off when the make-and-break signal is at low level. When the make-and-break switch is turned on, the demodulated signal is supplied from the demodulator 1 to the reference voltage unit 5. The reference voltage unit 5 uses averaging to convert the demodulated signal into a direct-current (dc) voltage, and applies the dc voltage as the reference voltage to the inverting input of the comparator 2. The controller 6 selectively outputs the high and low levels of the make-and-break signal.
FIG. 4 illustrates the operation of the make-and-break switch 3 in the conventional digital-signal forming circuit. In FIG. 4, time chart (A) shows time-slot condition, time chart (B) shows the contents of the received signal, time chart (C) shows strength-signal condition, and time chart (D) shows the condition of the make-and-break switch 3. FIGS. 5A and 5B illustrate the shaping of the demodulated signal Sf output from the demodulator 1 into rectangular waves.
With reference to FIGS. 3 to 5A and 5B, the operation of the conventional digital-signal forming circuit is described below.
A time T1, sufficiently before the start of a receiving-time slot period (hereinafter referred to simply as a xe2x80x9creceiving slotxe2x80x9d), has no received signal. Accordingly, the IF signal is not input to the IF signal input terminal 21, and the demodulator outputs no demodulated signal Sf, so that the comparator 2 outputs no digital signal including synchronizing signal Sy and communication data Sd. The controller 6 outputs the low-level make-and-break signal, which turns off the make-and-break switch 3. Thus, no demodulated signal Sf is supplied to the reference signal unit 5.
At a time T2 in a time slot positioned just before the receiving slot, the controller 6 outputs the high-level make-and-break signal, which turns on the make-and-break switch 3. At a time T3 from which the receiving slot begins, a signal modulated using the synchronizing signal Sy is received, and from a time T4, a signal modulated using communication data Sd is received. During the receiving slot, the demodulated signal Sf is output from the demodulator 1. The demodulated signal Sf is supplied to the non-inverting input of the comparator 2, and is supplied to the reference voltage unit 5 via the make-and-break switch 3 when it is turned on. The reference voltage unit 5 obtains a dc voltage Vf close to an average voltage by performing time-averaging on the demodulated signal Sf. The reference voltage unit 5 stores the dc voltage Vf in the capacitor 14, and applies it as the reference voltage to the inverting input of the comparator 2. By way of example, the demodulated signal Sf and the dc voltage Vf are shown in FIG. 5A.
The comparator 2 compares the voltage of the demodulated signal Sf with the dc voltage Vf. As shown in FIG. 5B, when the voltage of the demodulated signal Sf is not less than the dc voltage Vf, the output of the comparator 2 is at high level. When the voltage of the demodulated signal Sf is not greater than dc voltage Vf, the output of the comparator 2 is at low level. Accordingly, the demodulated signal Sf is shaped into rectangular waves, and the rectangular waves are supplied as the synchronizing signal Sy and the communication data Sd to the controller 6 and the digital signal output terminal 23.
As described above, the dc voltage Vf is obtained by averaging the demodulated signal Sf, in other words, it is the average voltage of the demodulated signal Sf. Therefore, the demodulated signal Sf is shaped into rectangular waves having equal widths, and the correct-width digital signal including the synchronizing signal Sy and the communication data Sd is obtained.
Finally, at time T5, the termination of the receiving slot causes the demodulator 1 not to output demodulated signal Sf, and the comparator 2 outputs no digital signal. Accordingly, the controller 6 outputs the low-level make-and-break signal, which turns off the make-and-break switch 3.
The above-described conventional digital-signal forming circuit is constructed so that the reference voltage is obtained in accordance with the average demodulated-signal voltage by turning on the make-and-break switch 3 in the period of the receiving slot. The make-and-break switch 3 cannot be turned on at the start time T3 of the receiving slot, due to variations in the characteristics of the components. Accordingly, the make-and-break switch 3 is turned on at time T2 just before the receiving slot so as to be turned on without a delay at the start time T3 of the receiving slot.
When another person uses an adjacent channel to perform transmission from a close place in the adjacent slot just before the receiving slot, the transmitted signal is input as an interference signal to the demodulator 1 from the time T2 at which the make-and-break switch 3 is turned on, to time T3 at which a transmitting slot from the person terminates. The demodulator 1 outputs the demodulated signal Sn based on the interference signal, and the dc voltage Vn in accordance with the demodulated signal Sn is stored in the capacitor 14 of the reference voltage unit 5. In general, the demodulated signal Sn is greater than the demodulated signal Sf, and the dc voltage Vn is greater than the dc voltage Vf.
In the case where the receiving slot begins at the time T3 when interference occurs, the comparator 2 slices the demodulated signal Sf, using the greater dc voltage Vn as a reference voltage. As a result, the demodulated signal Sf cannot be shaped into a correct-width digital signal, and synchronization cannot be established because first several bits of the synchronizing signal Sy are lost. This causes a problem in that communication may not be performed.
Accordingly, In order to solve the foregoing problem, it is an object of the present invention to provide a digital-signal forming circuit for obtain a complete synchronizing signal.
To this end, according to an aspect of the present invention, the foregoing object is achieved by providing a digital-signal forming circuit performing the steps of demodulating a time-divisionally received signal, shaping the demodulated signal into rectangular waves by implementing voltage comparison between the demodulated signal with a reference voltage, and outputting a digital signal obtained by shaping, wherein, when an interference signal is small in a non-receiving time-slot period which is not assigned for reception, a direct-current voltage obtained by averaging the demodulated signal is used as the reference voltage, and wherein, when the interference signal is large in the non-receiving time-slot period, a predetermined direct-current voltage is used as the reference voltage.
According to another aspect of the present invention, the foregoing object is achieved by providing a digital-signal forming circuit including: a demodulator for outputting a demodulated signal by demodulating a received signal; a signal comparator for shaping the demodulated signal into rectangular waves by performing voltage comparison between the demodulated signal and a reference voltage and outputting a digital signal obtained by shaping; an average-reference-voltage unit for outputting an average reference voltage by averaging the demodulated signal; a fixed-reference-voltage unit for outputting a fixed reference voltage having a predetermined voltage; a selection switch for selecting either of the two reference voltages and outputting the selected voltage to the signal comparator; a received-signal-strength detector for outputting a strength signal in accordance with the strength of the received signal; and a controller for controlling the selecting operation of the selection switch in accordance with the magnitude of the strength signal.
The controller may refer to the strength signal in a non-receiving time-slot period which is not assigned as a receiving time, and the controller may control the selecting operation of the selection switch so that the selection switch selects the average reference voltage when the strength signal being referred to is not more than a predetermined value and that the selection switch selects the fixed reference voltage when the strength signal being referred to is not less than the predetermined value.
The digital-signal forming circuit further includes a make-and-break switch for making and breaking the connection between the demodulator and the average-reference-voltage unit, and the controller may control the make-and-break switch so that, when the strength signal being referred to is not less than the predetermined value, and in a period in which the demodulated signal is a signal other than a synchronizing signal, the make-and-break switch is broken.
The average-reference-voltage unit may include a resistor connected across an input and output ends, two diodes connected across the input and output ends so that the polarities thereof are reverse, and a capacitor connected between the output end and the ground.
According to the present invention, when no interference occurs, an average reference voltage obtained in accordance with the voltage of a demodulated signal is used to perform the precise shaping of the demodulated signal, which forms a correct digital signal. In addition, when interference occurs in a non-receiving slot, a fixed reference voltage is not affected by the interference, and a correct digital signal can be formed from the demodulated signal.